In a process of manufacturing a fine and highly integrated LSI in recent years, a difference between the etching rates of a silicon oxide and a silicon nitride is utilized to form a shallow groove isolation (SGI) over a silicon substrate or to form a contact hole for the gate electrode of a MISFET (Metal Insulator Semiconductor Field Effect Transistor) in a self-align manner. A forming method for the shallow groove isolation (SGI) is described in Japanese Patent Laid-Open No 11-16999 and the like, for example. Further, a forming method for a self-align contact (SAC) is described in 11-17147 and the like, for example.
The silicon nitride, used in the forming step of a shallow groove isolation or the forming step of a self-align contact described above, is generally formed by the CVD method using, as a source gas, a silane type gas such as monosilane (SiH4) or the like and ammonia (NH3) or nitrogen (N2). However, it is known that a large amount of hydrogen, derived from the source gas, is taken into this silicon.
A Japanese Patent Laid-open No. 2000-58483 gazette (Mine et al.) points out the problem that when a silicon nitride, serving as a stopper film of a self-align contact, is deposited at an upper portion and a side of a gate electrode containing a p-type polycrystal silicon, boron (B), serving as a dopant in the p-type polycrystal silicon, is diffused into a gate insulator or a silicon substrate, whereby a flat band voltage (Vfb) or a threshold voltage (Vth) is varied and reliability of the gate insulator is degraded. Such problem is caused by the fact that hydrogen, derived from a material gas contained in the silicon nitride, increases diffusion of boron (enhanced diffusion).
This gazette discloses, as a measure for solving the above problem, a technique for suppressing the enhanced diffusion of boron, by depositing a silicon nitride using a source gas without hydrogen and by reducing the concentration of hydrogen in the film to 1×1021 atoms/cc or less. There is exemplified a mixed gas of a halogen compound of silicon, such as SiF4, SiCl4, SiBr4, and SiI4, and nitrogen, as the source gas without hydrogen.
A Japanese Patent Laid-open NO. 2000-114257 gazette (Matsuoka et al.) points out the problem that since a silicon nitride, deposited by a plasma CVD method using monosilane (SiH4) and nitrogen, has a large amount of hydrogen taken therein, to use this film as a gate insulator cause a harmful influence such as degradation of hot carrier, increase in leak current, or the like. Meanwhile, it also points out the problem that when a halogen compound of silicon such as SiF4 is used instead of monosilane, hydrogen is not taken in the film, but a large amount of halogen is taken therein, which causes trap site increase.
This gazette discloses, as a measure for solving the above problem, a technique for forming a silicon nitride containing a small amount of hydrogen or halogen, by exciting at least one of silicon tetrafluoride (SiF2) and nitrogen and by supplying it to a substrate. As a method for obtaining excited silicon difluoride, there is disclosed a method for electrically exciting silicon tetrafluoride (SiF4) by microwave discharge or for bringing silicon tetrafluoride into contact with a mass of heated Si. Further, as a method for supplying the excited gas to the substrate, there is disclosed a method for, before such two gases are put into a reaction chamber, mixing the gases in a preliminary chamber, which is provided for mixing these gases and is different from the reaction chamber, and thereafter supplying the mixed gases to the reaction chamber.
A Japanese Patent Laid-open No. 11-46000 gazette (Sakamoto) discloses a technique for manufacturing a thin film transistor using polycrystal silicon as a semiconductor region, wherein when a gate insulator and an interlayer insulator are formed over a polycrystal silicon, the gate insulator is made of a silicon oxide and the interlayer insulator is made of a silicon nitride, thereby reducing an overetching amount of the polycrystal silicon in the step of dry-etching the two insulators and of forming a contact hole reaching a thin polycrystal silicon.
Further, this gazette teaches the structure in which the above interlayer insulator is constituted by: an underlying silicon nitride having a high hydrogen containing rate; and an upper silicon nitride having a low hydrogen containing rate. When the hydrogen containing rate of the underlying silicon nitride is increased, a large amount of hydrogen is supplied into the polycrystal silicon and, therefore, crystal faults of the polycrystal silicon are decreased and the transistor characteristics are improved. Meanwhile, when the hydrogen containing rate of the upper silicon nitride is reduced, a fine film having less pin holes in number is obtained and, therefore, a dielectric strength of the transistor is improved.
The above-mentioned two silicon nitrides having the different hydrogen containing rates are continuously deposited by using a plasma CVD device. The underlying silicon nitride having a high hydrogen concentration is deposited by lowering a substrate temperature (250° C.), and the upper silicon nitride having a low hydrogen concentration is deposited by increasing a substrate temperature (390° C.).
A Japanese Patent Laid-open No. 9-289209 gazette (Sonoda et al.) discloses a technique for setting, to 0.6×1021 atoms/cm−3 or less, a bonding amount of Si—H in a silicon nitride used as an interlayer insulator or a passivation film to restrict generation of electron trap in a gate oxide film or a tunnel oxide film and to prevent variation in threshold values of a transistor. The above-mentioned silicon nitride is deposited by a plasma CVD method, which uses a gas having a Si—H bond such as monosilane (SiH4) or dichlorosilane (Si2H6).
A Japanese Patent Laid-open No. 2000-340562 gazette (Itoh et al.) points out the problem of negative bias temperature instability (NBTI) in which a threshold voltage of a MISFET is varied due to an influence on hydrogen contained in a silicon nitride used for a final protective film (final passivation film) or the like, thereby reducing a lifetime of a device product.
This gazette proposes to use a silicon nitride such that a Si—H bond is employed as a main structure and a Si—NH2 bond is employed as a sub-structure and an integral intensity of the peak of the Si—N bond intensity by a FTIR (Fourier Transform Infrared Spectro-photo) is 1000 times as large as or more than one of the peak of the Si—NH2 bond intensity, as a measure for restricting variation of the device characteristics due to hydrogen in the silicon nitride.
Note that a CVD furnace employing a typical remote plasma is disclosed in, for example, Japanese Patent Application Laid-Open: No. 9-181055 (the corresponding U.S. patent application Ser. No. 08/570,058 filed on Dec. 11, 1995); No. 10-154703 (the corresponding U.S. patent application Ser. No. 08/748,883 filed on Nov. 13, 1996); No. 10-154706 (the corresponding U.S. patent application Ser. No. 08/746,631 filed on Nov. 13, 1996); No. 10-163184 (the corresponding U.S. patent application Ser. No. 08/748,960 filed on Nov. 13, 1996); No. 10-178004 (the corresponding U.S. patent application Ser. No. 08/748,095 filed on Nov. 13, 1996); No. 10-189467 (the corresponding U.S. patent application Ser. No. 08/748,094 filed on Nov. 13, 1996); No. 10-256244 (the corresponding U.S. patent application Ser. No. 08/747,830 filed on Nov. 13, 1996); No. 11-74097 (the corresponding U.S. patent application Ser. No. 08/839,007 filed on Apr. 23, 1997); and the like.